Philipp Holzinger
Philipp Holzinger, M. Sc.
Information
Since November 2017, Philipp Holzinger is a member of the research staff at the Chair of Computer Architecture. He holds a Master’s Degree (M.Sc.) in Computer Science.
Research Interests
- Heterogeneous System Architecture
- Hardware Development with FPGAs
- High Level Synthesis
- Architectures for Deep Learning
Publications
2023
Most Resource Efficient Matrix Vector Multiplication on FPGAs
In: IEEE Access (2023), S. 1-1
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2023.3234622 , , , , :
2022
Interfacing real-time and offline power system simulation tools using UDP or FPGA systems
In: Electric Power Systems Research 212 (2022)
ISSN: 0378-7796
DOI: 10.1016/j.epsr.2022.108490 , , , , , , , , , , :
EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis
22nd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021 (Samos, GRC, 3. Juli 2022 - 7. Juli 2022)
In: Alex Orailoglu, Marc Reichenbach, Matthias Jung (Hrsg.): Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2022
DOI: 10.1007/978-3-031-15074-6_3 , , , , :
2021
The HERA Methodology: Reconfigurable Logic in General-Purpose Computing
In: IEEE Access 9 (2021), S. 147212-147236
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2021.3123874 , :
Fast HBM Access with FPGAs: Analysis, Architectures, and Applications
IEEE International Parallel and Distributed Processing Symposium Workshops (Virtual.)
DOI: 10.1109/ipdpsw52791.2021.00030 , , , :
Transparent FPGA Acceleration with TensorFlow
DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA 2021) (Virtual.) , , :
2019
A Hardware Inference Accelerator for Temporal Convolutional Networks
2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) (Helsinki, 29. Oktober 2019 - 30. Oktober 2019)
In: IEEE (Hrsg.): Proceedings of Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), 2019 IEEE 2019
DOI: 10.1109/NORCHIP.2019.8906963
URL: https://ieeexplore.ieee.org/document/8906963 , , , , , , :
Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications
ARCS 2019: 32nd International Conference on Architecture of Computing Systems (Copenhagen, Denmark, 20. Mai 2019 - 24. Mai 2019)
In: Trinitis, Carsten; Pionteck, Thilo (Hrsg.): Workshop Proceedings 2019 , , , , , :
Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems
Euro-Par 2018: Parallel Processing Workshops - Euro-Par 2018 International Workshops
In: Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL (Hrsg.): Euro-Par 2018: Parallel Processing Workshops, Cham: 2019
DOI: 10.1007/978-3-030-10549-5_57 , , , , , :
2018
A New Generic HLS Approach for Heterogeneous Computing: On the Feasibility of High-Level Synthesis in HSA-Compatible Systems
SAMOS XVIII: 2018 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (Pythagorion, Samos Island, 15. Juli 2018 - 19. Juli 2018)
In: Mudge Trevor, Pnevmatikatos Dionisios N. (Hrsg.): SAMOS XVIII: 2018 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, New York, NY, USA: 2018
DOI: 10.1145/3229631.3229634
URL: https://dl.acm.org/citation.cfm?doid=3229631.3229634 , , :
Heterogeneous Computing Utilizing FPGAs
In: Journal of Signal Processing Systems 91 (2018), S. 745--757
ISSN: 1939-8018
DOI: 10.1007/s11265-018-1382-7 , , , , , :
2017
LibHSA: One Step Towards Mastering the Era of Heterogeneous Hardware Accelerators using FPGAs
2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)
DOI: 10.1109/DASIP.2017.8122108 , , , , , :