Konrad Häublein
Konrad Häublein, M.Eng.
Research Interests
- FPGAs
- High Level Synthesis
- Smart Cameras
- Heterogeneous System Architectures
Publications
2019
Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications
ARCS 2019: 32nd International Conference on Architecture of Computing Systems (Copenhagen, Denmark, 20. Mai 2019 - 24. Mai 2019)
In: Trinitis, Carsten; Pionteck, Thilo (Hrsg.): Workshop Proceedings 2019 , , , , , :
Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications
ARCS 2019: 32nd International Conference on Architecture of Computing Systems (Copenhagen, 20. Mai 2019 - 24. Juni 2019) , , , , , :
2018
IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures
In: Journal of Real-Time Image Processing 14 (2018), S. 549--564
ISSN: 1861-8200
DOI: 10.1007/s11554-016-0587-x , , , :
Heterogeneous Computing Utilizing FPGAs
In: Journal of Signal Processing Systems 91 (2018), S. 745--757
ISSN: 1939-8018
DOI: 10.1007/s11265-018-1382-7 , , , , , :
2017
An Image Processing Operator Language for Design and Synthesis of Smart Camera Architectures
Parallel-Algorithmen und Rechnerstrukturen (Hagen)
In: Mitteilungen - Gesellschaft für Informatik e.V. 2017 , , , , :
LibHSA: One Step Towards Mastering the Era of Heterogeneous Hardware Accelerators using FPGAs
2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)
DOI: 10.1109/DASIP.2017.8122108 , , , , , :
Fast heterogeneous computing architectures for smart antennas
In: Journal of Systems Architecture (2017)
ISSN: 1383-7621
DOI: 10.1016/j.sysarc.2016.11.004 , , , , , :
2016
IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures
In: Journal of Real-Time Image Processing (2016), S. 1-16
ISSN: 1861-8200
DOI: 10.1007/s11554-016-0587-x
URL: http://link.springer.com/article/10.1007/s11554-016-0587-x , , , :
Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks
ARC 2016 - International Symposium on Applied Reconfigurable Computing (Mangaratiba, Brazil, 22. März 2016 - 24. März 2016)
In: Applied Reconfigurable Computing, Mangaratiba: 2016
DOI: 10.1007/978-3-319-30481-6 , , , :
Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures
16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos, 18. Juni 2016 - 21. Juni 2016)
In: Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2016
DOI: 10.1109/SAMOS.2016.7818350 , , , , , , :
Teaching Heterogeneous Computer Architectures Using Smart Camera Systems
Workshop on Microelectronics Education (Southampton)
In: Proceedings of the 11th Workshop on Microelectronics Education 2016 , , , , :
2015
Automatic Optimization of Hardware Accelerators for Image Processing
DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (Grenoble, 13. März 2015 - 13. März 2015)
In: Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) 2015
URL: http://arxiv.org/abs/1502.07448 , , , , , :
Synthesis and Optimization of Image Processing Accelerators using Domain Knowledge
In: Journal of Systems Architecture 61 (2015), S. 646-658
ISSN: 1383-7621
DOI: 10.1016/j.sysarc.2015.09.004
URL: https://www12.cs.fau.de/downloads/reiche/publications/RHRSHTF15.pdf , , , , , , :
Real-Time Correlation for Locating Systems Utilizing Heterogeneous Computing Architectures
Conference on Design & Architectures for Signal & Image Processing (Cracow)
In: Proceedings of the 2015 Conference on Design & Architectures for Signal & Image Processing 2015 , , , , :
FAUPU - A Design Framework for the Development of Programmable Image Processing Architectures
2015 International Conference on ReConFigurable Computing and FPGAs (Mayan Riveria, Mexico)
In: Proceedings of ReConFig' 15 2015
DOI: 10.1109/ReConFig.2015.7393309 , , , , :
2014
Fast and Generic Hardware Architecture for Stereo Block Matching Applications on Embedded Systems
2014 International Conference on ReConFigurable Computing and FPGAs (Cancun, Mexico, 8. Dezember 2014 - 10. Dezember 2014)
In: Proceedings of ReConFig' 14 2014
DOI: 10.1109/ReConFig.2014.7032518 , , :