Daniel Reiser

Daniel Reiser, M. Sc.

Department Informatik (INF)
Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Reiser D., Reichel P., Pechmann S., Mallah M., Oppelt MP., Hagelauer A., Breiling M., Fey D., Reichenbach M.:
A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification
In: Journal of Low Power Electronics and Applications 12 (2022)
ISSN: 2079-9268
DOI: 10.3390/jlpea12010002

Fritscher M., Knödtel J., Reiser D., Mallah M., Pechmann S., Fey D., Reichenbach M.:
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
In: Proc. of 12th IEEE Latin America Symposium on Circuits and System 2021
DOI: 10.1109/lascas51355.2021.9459159
Holzinger P., Reiser D., Hahn T., Reichenbach M.:
Fast HBM Access with FPGAs: Analysis, Architectures, and Applications
IEEE International Parallel and Distributed Processing Symposium Workshops (Virtual.)
DOI: 10.1109/ipdpsw52791.2021.00030
Pechmann S., Mai T., Potschka J., Reiser D., Reichel P., Breiling M., Reichenbach M., Hagelauer A.:
A low-power rram memory block for embedded, multi-level weight and bias storage in artificial neural networks
In: Micromachines 12 (2021), Art.Nr.: 1277
ISSN: 2072-666X
DOI: 10.3390/mi12111277

Knödtel J., Fritscher M., Reiser D., Fey D., Breiling M., Reichenbach M.:
A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories
9th International Conference on Modern Circuits and Systems Technologies, MOCAST 2020 (Bremen, 7. September 2020 - 9. September 2020)
In: 9th International Conference on Modern Circuits and Systems Technologies, {MOCAST} 2020, Bremen, Germany, September 7-9, 2020 2020
DOI: 10.1109/MOCAST49295.2020.9200241